Post-Moore’s Law Memory Architecture

Project description: In this project, we seek to explore emerging technologies that are likely to thrive as Moore’s Law slows down or ends. We explore two directions: persistent memory and memory disaggregation. For the first, we explore how persistency can be integrated into computer systems. Persistent Memory (PM) provides memory that can store data in a non-volatile manner, whether through new memory fabric (e.g. Intel Pmem, STT RAM), traditional memory fabric with battery backing (e.g. battery-backed DRAM), or traditional NVM repurposed for memory interface (e.g. memory-semantic SSD). PM provides tremendous potentials, where users can place data in the form of data structures persistently in memory. This requires a new OS abstraction. New issues that need to be considered including crash consistency, persistency performance, new security threats and mitigation, fragmentation, and how to support Trusted Execution Environment that utilizes PM. ARPERS research group has worked on PM research since 2011 for 12+ years and published 30 papers. We have identified new problems, contributed new concepts, new approaches to solving problems, new techniques (hardware, software, and their interface). For the second, we explore how memory disaggregation will affect workload performance in the cloud, and how disaggregated memory should be architected for better performance and efficiency. Approaches that we consider include processing in memory (PIM) and CXL-attached memory appliances.